Some processors and/or processor logical cores are architected to access a fixed content memory device located within the same physical computer chip package or die as the processor. In such processors, the information within the fixed content memory device may be exclusively used by the respective processor core(s) to implement certain operations. For example, some processors access read only memory (ROM) in order to perform one or more machine instructions (e.g. microcode (μcode)) that correspond to higher level instructions, such as micro-operations (“μops”), and macro-instructions (“user-level” instructions).
Other processor architectures (e.g. instruction set architecture, microprocessor architecture, and/or other processor design aspects) may specify exclusive processor use of a memory device (e.g. erasable programmable read only memory (EPROM)) located external to a computer chip on which one or more processor cores reside. Unfortunately, since fixed content memory devices such as ROMs are not programmable by software running on the processor(s) to which the fixed content memory correspond, subsequent patches, revisions, improvements, enhancements, and/or other changes, etc., cannot easily be made to the content stored within them. The information stored on the fixed content memory device may, however, be protected from being altered by system software and system devices.
To protect the integrity of processor operation, memory used exclusively by components of processor architecture would need some level of protection from being altered by system software and other software and devices. Use of memory content to implement operations used by a processor when the content is infected with a system software virus could lead to system failure. Furthermore, to allow system software and processor(s) to share an un-fixed memory (e.g. information stored in dynamic random access memory (DRAM)), some processors may direct processor access to a region of system memory to store code (e.g., ucode) to implement various processor operations. Unfortunately, as explained above, such a configuration can leave the memory region unprotected and consequently leave the processor vulnerable to corruption.